1. Field of the Invention
This invention relates generally to methods of and apparatus for testing transistor devices, and more particularly, to methods of and apparatus for measuring the collector-emitter leakage current of transistor devices with the base open (i.e., I.sub.CEO).
2. Description of the Prior Art
In testing transistor devices, measuring I.sub.CEO has heretofore presented a problem due to the generally long measuring times required. In making the test, a D.C. voltage has been placed on the collector of the transistor device while the base of the device is open. Because of the Miller Capacitance between the base and collector junctions of the device, current will flow through the base until the Miller Capacitance is charged. While this charging current is flowing, measurement of the I.sub.CEO will be inaccurate.
This problem becomes particularly troublesome in transistor devices having high gains, for example Darlington pairs and opto-isolators using Darlington pairs for their amplifier portion. This is because the Miller Capacitance is equal to the collector-base capacitance multiplied by the transistor device gain. Depending upon the particular characteristics of the transistor device under test, times for measuring I.sub.CEO using the prior art techniques can range from 1 to 12 seconds. As a result, either adequate time must be allowed for the long test periods or sampling the devices must be resorted to rather than 100% testing.